![]() |
¾÷ü¸í | ¾¾¿¡½º |
¸ðÁýºÐ¾ß/¾÷¹« | RFÁß°è±â °³¹ßÀÚ ¸ðÁý |
°æ·Â À¯¹« | ½ÅÀÔ ¹× °æ·Â |
º´¿ªÆ¯·Ê | °¡´É(½Å±ÔTO¾øÀ½) |
¸ðÁý±âÇÑ | ä¿ë½Ã±îÁö |
±Ù¹«Áö | ÆÇ±³ |
ȸ»ç ȨÆäÀÌÁö | http://cs-holdings.com |
Á¢¼ö Email | sskwon@cs-holdings.com |
¹®ÀÇÀüȹøÈ£ ¹× ´ã´çÀÚ |
031-622-3338 |
±âŸ»çÇ× | (ÁÖ)¾¾¿¡½º´Â 1999³â 02¿ù 03ÀÏ¿¡ ¼³¸³µÈ ±âŸ ¹«¼± Åë½ÅÀåºñ Á¦Á¶¾÷¾÷Á¾ÀÇ ÃʼÒÇüÁß°è±â,ÅëÇÕÁß°è±â,º¯ÆÄÁß°è±â,RFºÐ»êÁß°è±â,°³ÀοëÁß°è±â Á¦Á¶,µµ¸Å»ç¾÷À» ÇÏ´Â ÄÚ½º´Ú, ¿ÜºÎ°¨»ç¹ýÀÎ, ¼öÃâÀÔ ±â¾÷ ÀÔ´Ï´Ù. 1. Ç÷§ÆûÆÀ Æß¿þ¾î °³¹ßÀÚ(S/W)¸ðÁý - °øÅëÀÚ°Ý : ´ëÁ¹ÀÌ»ó(2,3³â) - ´ã´ç¾÷¹« : Áß°è±â Æß¿þ¾î(S/W) °³¹ßÀÚ 1) MCU(STM, Microchips µî) 2) Linux±â¹Ý SW ¾ÖÇø®ÄÉÀÌ¼Ç °³¹ß - ¿ì´ë»çÇ× : °ü·Ã ¾÷¹« °æÇè º¸À¯ 1) CPU(Á¦¾îºÎ) H/W ȸ·Î ¼³°è °æÇè º¸À¯ 2) GUI S/W °³¹ß °æÇè º¸À¯ 2. µðÁöÅÐÆÀ FPGA¼³°è ¹× Digital subsystem °³¹ßÀÚ ¸ðÁý - °øÅëÀÚ°Ý : Çз¹«°ü - ´ã´ç¾÷¹« : 1) FPGA ±â¹Ý À¯/ ¹«¼± Åë½Å ½Ã½ºÅÛ Digital signal processing ¼³°è 2) MatlabÀ» Ȱ¿ëÇÑ Digital signal processing ¼³°è/ °ËÁõ 3) Hardware ¼³°è À¯°æÇèÀÚ - ¿ì´ë»çÇ× : 1) Modeling based FPGA ¼³°è °¡´ÉÀÚ Simulink, DSP builder, System generator 2) 4G/ 5G Physical layer ¼³°è À¯ °æÇèÀÚ 3) À¯/ ¹«¼± Áß°è±â °³¹ß À¯ °æÇèÀÚ 4) °æ·Â 12³â ÀÌ»ó * ±Ù¹«Á¶°Ç - Á¤±ÔÁ÷(¼ö½À±â°£)-3°³¿ù - ÁÖ 5ÀÏ(¿ù~±Ý) 09:00~18:00 - (13487) °æ±â ¼º³²½Ã ºÐ´ç±¸ ÆÇ±³·Î228¹ø±æ 15, À©½ºµ¿ 8Ãþ * ÀüÇüÀýÂ÷ - ¼·ùÀüÇü > 1Â÷¸éÁ¢ > 2Â÷¸éÁ¢ > ä¿ë * ¸ðÁý±âÇÑ - ¼ö½Ãä¿ëÀ¸·Î ä¿ë ½Ã ¸¶°¨ * ¹®ÀÇ ¹× Áö¿ø - °æ¿µ°ü¸®ÆÀ, sskwon@cs-holdings.com |
¸ñ·ÏÀ¸·Î | ¼öÁ¤Çϱâ/µî·ÏÀϰ»½Å½Åû ±¸ÀÎÁ¾·á-»èÁ¦Çϱâ |
Copyright by RF designhouse. All rights reserved. |